PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 423

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
CONFIG_RWB
BUSY
The CONFIG_RWB register allows the indirect addressing method to specify whether a read
or write is being performed. A value of ‘1’ means that a read is to be performed on the data at
CALENDAR_ADDR and will be placed in the CALENDAR_DATA register. A value of ‘0’
means that a write of the information in CALENDAR_DATA will be performed at address
CALENDAR_ADDR.
The BUSY bit is used in indirect addressing to indicate the operation of read or write is
currently being executed. A value of ‘1’ means the operation is currently in progress and the
microprocessor should wait. A value of ‘0’ means the operation is finished and the
microprocessor may proceed with further access.
S/UNI-2488 Telecom Standard Product Datasheet
Released
423