PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 561

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

14.6
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
ROHFP
Figure 48 TPOH Input Timing
When the Path Overhead Insertion interface is not being used, the THPP should be set to use its
internal insertion registers (see register description for THPP Indirect Register 01H, the THPP
Source and Pointer Control Register).
SONET Alarm Indication Signal
Figure 49 shows the receive path alarm functional timings. RALM is used to output the “ORing”
of the enabled path defects. RALM is timed off of ROHCLK (a 20.736 MHz clock generated by
gapping a 25.92 MHz clock (33% high duty cycle)). 2592 clock cycles of ROHCLK are output
on RALM between two ROHFP assertions. ROHFP high identifies clock cycle 1 of 2592. Only
the first 72 cycles (cycles 1 to 72) contain necessary information. That information is repeated
again at clock cycles 865-936 and 1729-1800.
Figure 49 RALM and ROHFP Output Timing
RALM
TPOHRDY
TPOHEN
TOHCLK
72 clock cycles
TOHFP
valid
TPOH
Repeat#1
8
J1
J1
8
72 clock cycles
valid
B3
B3
8
Repeat#2
S/UNI-2488 Telecom Standard Product Datasheet
... ...
8
72 clock cycles
Z4
Z4
valid
#3
8
Repeat#3
Z5
Z5
8
J1
J1
Released
8
561