PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 88

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

10.6
10.6.1
10.6.2
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
SONET/SDH Virtual Container Aligner (SVCA)
The SONET (SDH) Virtual Container Aligner (SVCA) block aligns the payload data from an
incoming SONET (SDH) data stream to a new transport frame reference. The alignment is
accomplished by recalculating the STS (AU) payload pointer value based on the offset between
the transport overhead of the incoming data stream and that of the outgoing data stream.
Frequency offsets (e.g., due to plesiochronous network boundaries, or the loss of a primary
reference timing source) and phase differences (due to normal network operation) between the
incoming data stream and the outgoing data stream are accommodated by pointer adjustments in
the outgoing data stream.
Elastic Store
The Elastic Store performs rate adaptation between the line side interface and the system side
interface. The entire incoming payload, including path overhead bytes, is written into a first-in-
first-out (FIFO) buffer at the incoming byte rate. Each FIFO word stores a payload data byte and
a one bit tag labeling the J1 byte. Incoming pointer justifications are accommodated by writing
into the FIFO during the negative stuff opportunity byte or by not writing during the positive stuff
opportunity byte. Data is read out of the FIFO in the Elastic Store block at the outgoing byte rate
by the Pointer Generator. Analogously, outgoing pointer justifications are accommodated by
reading from the FIFO during the negative stuff opportunity byte or by not reading during the
positive stuff opportunity byte.
The FIFO read and write addresses are monitored. Pointer justification requests will be made to
the Pointer Generator based on the proximity of the addresses relative to programmable
thresholds. The Pointer Generator schedules a pointer increment event if the FIFO depth is below
the lower threshold and a pointer decrement event if the depth is above the upper threshold. FIFO
underflow and overflow events are detected and path AIS is optionally inserted in the outgoing
data stream for three frames to alert downstream elements of data corruption.
Pointer Generator
The Pointer Generator generates the H1 and H2 bytes in order to identify the location of the path
overhead byte (J1) and all the synchronous payload envelope bytes (SPE) of the STS-48c (VC16-
16c) payloads. Within the pointer generator algorithm, five states are defined as shown below:
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·
·
·
·
The transition from the NORM to the INC, DEC, and NDF states are initiated by events in the
Elastic Store block. The transition to/from the AIS state are controlled by the pointer interpreter
in the Receive High Order Path Processor block. The transitions from INC, DEC, and NDF states
to the NORM state occur autonomously with the generation of special pointer patterns.
NORM_state (NORM)
AIS_state (AIS)
NDF_state (NDF)
INC_state (INC)
DEC_state (DEC)
S/UNI-2488 Telecom Standard Product Datasheet
Released
88