PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 293

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
UNEQV
The path overhead may be forced to all-zeros or all-ones using the THPP’s SRC register
fields in this register. Note that the Bellcore spec requires the Path Signal Label (C2) to be set
to 0x00. This must be set manually. The FSBEN and FSB fields in THPP indirect registers
00H and 04H respectively may be used to set the same value in the FSB as programmed in
UNEQV. Regardless, the B3 will be calculated and inserted such that the unequipped frame
has a valid BIP.
When UNEQ is set to logic one, an all-one or an all-zero pattern is inserted in the payload.
The UNEQV bit in this register determines the pattern. When UNEQ is set logic 0, no pattern
is inserted.
The unequipped value (UNEQV) bit controls the value inserted in the payload. When
UNEQV is set to logic 1, an all-one pattern is inserted in the payload if enabled via the
UNEQ register bit. When UNEQV is set to logic 0, an all-zero pattern is inserted in the
payload if enabled via the UNEQ register bit.
S/UNI-2488 Telecom Standard Product Datasheet
Released
293