PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 415

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Register 0780H: RXPHY Configuration
All Reserved bits must be set to their default values for proper operation.
RXPRST
ODDPARITY
Reserved
Reserved1
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The RXPRST bit is used to reset the RXPHY circuitry. When RXPRST is set to logic zero,
the RXPHY operates normally. When RXPRST is set to logic one, the RXPHY ignores all
pin inputs but the register bits may be accessed for purposes of initialization. The RXPHY
deasserts all outputs until logic zero is written to RXPRST.
The ODDPARITY bit is used to set the parity generated by the RXPHY for the UL3 or POS
L3 interface. When set to logic 1, odd parity is generated. When set to logic 0, even parity is
generated.
The Reserved bits should be set to logic 0 for proper operation.
The Reserved1 bit should be set to logic1 for proper operation.
R/W
R/W
R/W
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Unused
Unused
RSXPAUSE[1]
RSXPAUSE[0]
Unused
Unused
Reserved
Reserved
Unused
Reserved
Reserved
Reserved1
Reserved
ODDPARITY
RXPRST
Function
Unused
S/UNI-2488 Telecom Standard Product Datasheet
Default
X
X
0
0
X
X
0
0
X
X
0
0
0
0
0
1
Released
415