Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 104

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
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7 U G T / C P W C N
Interrupt On Ready
Normally, when the DMA has been enabled by the CPU to request the bus
while the I/O device’s Ready line is inactive, the Ready line’s transition to
the active state causes the BUSREQ line to go Low (Figure 65). It does so
within two clock cycles if the setup time to the rising edge of CLK is met.
This does not take place, however, when the Interrupt on Ready option
(also called the Interrupt Before Requesting Bus option) is selected. When
this option is used, the DMA interrupts the CPU when the Ready line
comes active. The CPU’s interrupt service routine now writes control bytes
to the DMA, which enable the DMA to request the bus after the service
routine finishes.
As noted earlier, the CPU cannot respond to an interrupt when the DMA
is bus master. Thus, when enabled in Continuous mode, the DMA inter-
rupts the CPU when the Ready line first becomes active, but not on
succeeding transitions.
The Interrupt on Ready option is typically used to put new starting
addresses into the DMA, so that transfers go to a part of memory that is
dynamically determined.
Interrupt Service Routines
In addition to the DMA’s extensive programmability for mode-setting
(usually done at power-up initialization), numerous commands (control
bytes) are designed for use in various interrupt service routines.
The next chapter on “Programming,” fully explains the commands, but a
quick overview follows.
Some typical functions for which control bytes are available for use in
interrupt service routines include:
•
Reset the DMA
–
–
Enable the DMA for bus requesting
Disable the DMA for bus requesting
Direct Memory Access