Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 250

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

230
ASYNCHRONOUS OPERATION
UM008101-0601
<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Parity Error
Receive Overrun Error
Framing Error
End-of-Frame (SDLC)
First Data Character
First Non-Sync Character (SYNC)
Valid Address Byte (SDLC)
Overview
Buffer Becoming Empty
DCD Transition
CTS Transition
SYNC Transition
Tx Underrun/EOM
Break/Abort Detection
Figure 110. Interrupt Structure
To receive or transmit data in the Asynchronous mode, the Z80 SIO must
be initialized with the following parameters: character length, clock rate,
number of stop bits, even or odd parity, interrupt mode, and receiver or
transmitter enable. The parameters are loaded to the appropriate write
Receive Character
Condition Interrupt
Special Receive
External Status
Interrupt
Transmit Interrupt
Receive Characters
First Character
Interrupt on
Interrupt on All
Serial Input/Output
Interrupt
Receive
Z80-SIO
Interrupt