Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 252

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

232
Table 3. Contents of Write Registers 3, 4, and 5 in Asynchronous Modes
UM008101-0601
WR3 00 = Rx 5 Bits/Char
WR4 00 = x1 Clock Mode
<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Bit 7
10 = Rx 6 Bits/Char
01 = Rx 7 Bits/Char
11 = Rx 8 Bits/Char
01 = x16 Clock Mode
10 = x32 Clock Mode
11 = x64 Clock Mode
Asynchronous Transmit
Bit 6
The Transmit Data output (TxD) is held marking (High) when the trans-
mitter has no data to send. Under program control, the Send Break (WR5,
D4) command can be issued to hold TxD spacing (Low) until the
command is cleared.
The Z80 SIO automatically adds the start bit, the programmed parity bit
(odd, even, or no parity), and the programmed number of stop bits to the
data character to be transmitted. When the character length is six or seven
bits, the unused bits are automatically ignored by the Z80 SIO. If the char-
acter length is five bits or less, refer to the table in the Write Register 5
description (Z80 SIO Programming section) for the data format.
Serial data is shifted from TxD at a rate equal to 1, 1/16th, 1/32nd, or 1/64th
of the clock rate supplied to the Transmit Clock input TxC Serial data is
shifted out on the falling edge of TxC.
If set, the External/Status Interrupt mode monitors the status of DCD, CTS,
and SYNC throughout the transmission of the message. If these inputs
change for a period of time greater than the minimum specified pulse
width, the interrupt is generated. In a transmit operation, this feature is used
to monitor the modem control signal CTS.
Bit 5
Auto
Enables
0
Bit 4 Bit 3
0
0
0
00 = Not Used
01 = 1 Stop Bit/Char
10 = 1-1/2 Stop Bits/
Char
11 = 2 Stop Bits/Char
0
Bit 2
Serial Input/Output
Bit 1
0
Even/
Odd
Parity
Bit 0
Rx
Enable
Parity
Enable