Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 228

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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TTL-Compatible Inputs and Outputs
Two Independent Full-Duplex Channels
Data Rates in Synchronous or Isosynchronous Modes:
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Receiver Data Registers Quadruply Buffered; Transmitter Doubly
Buffered
Asynchronous Features:
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Binary Synchronous Features:
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HDLC and IBM SDLC Features:
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0-800K Bits/Second with 4 MHz System Clock Rate
0-1.2M Bits/Second with 6 MHz System Clock Rate
0-2.5M Bits/Second with 10 MHz System Clock Rate
5, 6, 7, or 8 Bits per Character
1, 1 1/2, or 2 Stop Bits
Even, Odd, or No Parity
x1, x16, x32, and x64 Clock Modes
Break Generation and Detection
Parity, Overrun, and Framing Error Detection
Internal or External Character Synchronization
One or Two Sync Characters in Separate Registers
Automatic Sync Character Insertion
CRC Generation and Checking
Abort Sequence Generation and Detection
Automatic Zero Insertion and Deletion
Automatic Flag insertion Between Messages
Address Field Recognition
1-Field Residue Handling
Valid Receive Messages Protected from Overrun
Serial Input/Output