Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 306

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

286
UM008101-0601
<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Sync Modes 0 and 1 (D4 and D5)
These bits select various options for character synchronization.
Table 24. Sync Modes
Figure 118. Write Register 4
Clock Rate 0 and 1 (D6 and D7)
These bits specify the multiplier between the clock (TxC and RxC) and data
rates. For synchronous modes, the x1 clock rate must be specified. Any rate
may be specified for asynchronous modes; however, the same rate must be
D7
Sync Mode 1
0
0
1
1
D6
0
1
0
1
0
0
1
1
X1 Clock Mode
X16 Clock Mode
X32 Clock Mode
X64 Clock Mode
D5
0
0
1
1
D4
0
1
0
1
Sync Mode 0
8-Bit SYNC Character
16-Bit SYNC Character
SDLC Mode (0111 1110 Flag)
External SYNC Mode
D3
0
0
1
1
0
1
0
1
D2
0
1
0
1
SYNC Modes Enable
1 Stop Bit/Character
1-1/2 Stop Bits/Character
2 Stop Bits/Character
D1
Result
8-bit programmed sync
16-bit programmed sync
SDLC mode (0111 1110 flag pattern)
External Sync mode
D0
Parity Enable
Parity Even/Odd
Serial Input/Output