Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 220

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
Z80
CPU
<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
+V
I/O Device Interface
IEI
PI0
IEO
If more than four PIO devices must be accommodated, a look-ahead struc-
ture may be used as shown in Figure 14. With this technique, more than
thirty PIOs may be chained together using standard TTL logic.
Figure 14.
In this example, the Z80 PIO is connected to an I/O terminal device, which
communicates over an 8-bit parallel bidirectional data bus as illustrated in
Figure 15. Mode 2 operation (bidirectional) is selected by sending the
following control word to Port A:
Next, the appropriate interrupt vector is loaded (refer to Z80 CPU User’s
Manual for details on the operation of the interrupt).
D7
IEI
1
PI0
IEO
D6
0
IEI
D5
PI0
X
IEO
A Method of Extending the Interrupt Priority Daisy-Chain
D4
X
IEI
PI0
IEO
D3
1
Mode Control
D2
1
Data Bus
D1
1
D0
1
IEI
PI0
IEO
IEI
PI0
IEO
IEI
PI0
Parallel Input/Output
IEO
IEI
PI0
IEO