Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 115

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
In addition, bits 7, 6, 3, and 2 of the variable-timing byte allow termination
of various lines 1/2 cycle earlier than specified in bits 1 and 0. The chapter
on “Timing” illustrates and describes the effect of this in detail.
Particular note must be taken of the IORQ line when variable-cycle timing
is used in sequential transfers or transfer/searches. In I/O-to-memory or
memory-to-I/O operation, the memory port must be programmed to allow
its IORQ line to end early. (The IORQ line normally has nothing to do with
memory). However, this requirement does not apply to the CMOS DMA
counter controller. If an I/O-to-I/O operation is being performed, both ports
must have their IORQ lines end early. When the variable-timing feature is
employed the IORQ line changes logic levels off a different clock cycle
edge than the other control lines.
Figure 41.
WR Ends 1/2 Cycle Early = 0
RD Ends 1/2 Cycle Early = 0
MREQ Ends 1/2 Cycle Early = 0
Write Register 1 Group
D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
0
1
1
0
0
1
0
1
= Port A Address Decrements
= Port A Address Increments
= Port A Address Fixed
0 = Port A is Memory
0 = Port A is I/O
1
0 = IORQ Ends 1/2 Cycle Early
0
0
1
1
0
0
1
0
1
0
= Cycle Length = 4
= Cycle Length = 3
= Cycle Length = 2
= Do Not Use
Port A Variable
Timing Byte
Base Register Byte
<   % 2 7 2 G T K R J G T C N U
Direct Memory Access
7 U G T / C P W C N