Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 71

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
Figure 22.
In the Burst mode (Figure 22), the bus is requested in the same manner as
previously, but when the DMA has control of the bus it continues to transfer
bytes until it encounters either an inactive Ready signal from an I/O port, an
end-of-block, or a byte match as in Figure 20. If the Ready line goes
inactive before end-of-block is reached, the DMA releases the bus to the
CPU and repetitively tests the Ready signal until it comes active again.
Then it requests the bus again and continues its transfers. Because of this,
the Burst mode is often the most useful one for general-purpose applica-
tions. It does not request the bus until it actually can use it, but once it
Request Bus
Active
RDY
?
NO
Burst Mode
YES
NO
Transfer/Search One Byte
(See
Set Status Flag
Request Bus
of Block
Enable
Active
• Interrupt
• Release Bus
• Auto Restart
Figure 20)
DMA
RDY
End
?
?
YES
YES
NO
<   % 2 7 2 G T K R J G T C N U
Direct Memory Access
7 U G T / C P W C N