Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 139

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
  
Address Loading
Write starting addresses to the starting-address registers for each port using
WR0 (Port A) and WR4 (Port B). They are loaded to the address counters
by the LOAD command. The addresses must he written to the registers
before they are loaded to the counters.
New addresses may be written to the address registers at any time when the
CPU is bus master, even between transfers and even when the DMA is oper-
ating in the Auto Restart mode, for example, in Byte mode between byte
transfers. With the exception of the Auto Restart mode, the new addresses
must be reloaded before they are used. If a Forced-Ready condition is used,
the LOAD command must precede the FORCE READY command.
Fixed-Address Destination Ports
A special circumstance arises when programming a destination port to have
a fixed address. The load command in WR6 only loads a fixed address to a
port selected as the source, not to a port selected as the destination.
Therefore, a fixed-destination address must be loaded after temporarily
declaring its port as a source port. The true source port is subsequently
declared (making the other port a destination) and the true source address is
then loaded.
The following example describes the steps in this procedure, assuming that
transfers are to occur from a variable-address source (Port A) to a fixed-
address destination (Port B).
1. Write Port B (fixed destination) address to WR4.
2. Temporarily declare Port B as source in WR0 (bit 2 = 0).
3. Load Port B address with the LOAD command.
4. Write Port A (variable source) starting address to WR0.
5. Declare Port A as source in WR0 (bit 2 = 1).
6. Load Port A address with the
command.
LOAD
UM008101-0601
Direct Memory Access