Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 260
Z0847006PSG
Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z0847006PSG
Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Z0847006PSG
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UM008101-0601
< % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Synchronous Modes Of Operation
Monosync
In a Receive operation, matching a single sync character (8-bit sync
mode) with the programmed sync character stored in WR7 implies char-
acter synchronization and enables data transfer.
Bisync
Matching two contiguous sync characters (16-bit sync mode) with the
programmed sync characters stored in WR6 and WR7 implies character
synchronization. In both the Monosync and Bisync modes, SYNC is used
as an output, and is active for the part of the receive clock that detects the
sync character.
External Sync
In this mode, character synchronization is established externally. SYNC is
an input that indicates external character synchronization has been
achieved. After the sync pattern is detected, the external logic must wait
for two full Receive Clock cycles to activate the SYNC input. The SYNC
input must be held Low until character synchronization is lost. Character
assembly begins on the rising edge of RxC that precedes the falling edge
of SYNC.
In all cases after a reset, the receiver is in the Hunt phase, during which
the Z80 SIO looks for character synchronization. The hunt can begin only
when the receiver is enabled, and data transfer can begin only when char-
acter synchronization has been achieved. If character synchronization is
lost, the Hunt phase can be re-entered by writing a control word with the
Enter Hunt Phase bit set (WR3, D4). In the Transmit mode, the trans-
mitter always sends the programmed number of sync bits (8 or 16). In the
Serial Input/Output
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