Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 261

IC 6MHZ Z80 NMOS DART 40-DIP

Z0847006PSG

Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet

Specifications of Z0847006PSG

Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z0847006PSG
Manufacturer:
Zilog
Quantity:
22
Table 5. Contents of Write Registers 3, 4, and 6 In Synchronous Modes
UM008101-0601
WR
3
WR
4
WR
5
Bit 7
00 = Ax 5 Bits/char
10 = Rx 6 Bits/char
01 = Rx 7 Bits/char
11 = Rx 8 Bits/char
0
DTR
Bit 6
0
00 = Tx 5 Bits (or less)/
char
10 = Tx 6 Bits/char
01 = Tx 7 Bits/char
11 = Tx 8 Bits/char
Monosync mode, the transmitter transmits from WR6; the receiver
compares against WR7.
In the Monosync, Bisync, and External Sync modes, assembly of received
data continues until the Z80 SIO is reset, or until the receiver is disabled (by
command or by DCD in the Auto Enables mode), or until the CPU sets the
Enter Hunt Phase bit.
After initial synchronization has been achieved, the operation of the Mono-
sync, Bisync, and External Sync modes is similar. Any differences are spec-
ified in the following text.
Table 5 describes how WR3, WR4, and WR5 are used in synchronous
receive and transmit operations. WR0 points to other registers and issues
various commands, WR1 defines the interrupt modes, WR2 stores the
interrupt vector, and WR6 and WR7 store sync characters.
trates the typical program steps that implement a half-duplex Bisync
transmit operation.
Bit 5
Auto
Enables
00 = 8-bit Sync Char
01 = 16-bit Sync Char
10 = SDLC Mode
11 = Ext Sync Mode
Bit 4
Enter Hunt
Mode
Send
Break
Bit 3
Rx CRC
Enable
0
Selects
Sync
Modes
Tx Enable 1
Bit 2
0
0
Selects
Sync
Modes
Selects
CRC-16
Z80 CPU Peripherals
Bit1
Sync char
load
inhibit
Even/Odd
Parity
RTS
Serial Input/Output
User Manual
Table 6
Bit 0
Rx
Enable
Parity
Enable
Tx CRC
Enable
illus-
241

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