Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 294

IC 6MHZ Z80 NMOS DART 40-DIP

Z0847006PSG

Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet

Specifications of Z0847006PSG

Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z0847006PSG
Manufacturer:
Zilog
Quantity:
22
274
UM008101-0601
<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Figure 114. Write Register 0
Pointer Bits (D2-D0)
Bits D2-D0 are pointer bits that determine which write register the next
byte writes to or which read register the next byte reads from. The first byte
written to each channel after a reset (either by a Reset command or by the
external reset input) goes to WR0. Following a read or write to any register
(except WR0), the pointer points to WR0
Command Bits (D5-D3)
Three bits, D5-D3, are encoded to issue the seven basic Z80 SIO
commands
D7
0
0
1
1
D6
0
1
0
1
Null Code
Reset Rx CRC Checker
Reset Tx CRC Generator
Reset Tx Underrun/EOM Latch
D5
0
0
0
0
1
1
1
1
(Table
D4
0
0
1
1
0
0
1
1
13).
D3
0
1
0
1
0
1
0
1
Null Code
Send Abort (SDLC)
Reset Ext/Status Interrupts
Channel Reset
Enable INT on Next Ax Character
Reset TxINT Pending
Error Reset
Return from INT (CH-A Only)
D2
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
Register 0
Register 1
Register 2
Register 3
Register 4
Register 5
Register 6
Register 7
Serial Input/Output

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