Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 243

IC 6MHZ Z80 NMOS DART 40-DIP

Z0847006PSG

Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet

Specifications of Z0847006PSG

Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z0847006PSG
Manufacturer:
Zilog
Quantity:
22
UM008101-0601
Data Path
Table 1. Write Register Functions
Table 2. Read Register Functions
The transmit and receive data path for each channel is depicted in
Figure
arrangement (to provide a 3-byte delay) in addition to the 8-bit receive shift
register. This arrangement creates additional time for the CPU to service an
interrupt at the beginning of a block of high-speed data. The receive error
FIFO stores parity and framing errors and other types of status information
for each of the three bytes in the receive data FIFO.
Incoming data is routed through one of several paths depending on the
mode and character length. In the Asynchronous mode, serial data is
Bit
RR0
RR1
RR2
Bit
WR0
WR1
WR2
WR3
WR4
WR5
WR6
WR7
109. The receiver contains three 8-bit buffer registers in a FIFO
Function
Transmit/Receive buffer status, interrupt status, and external status
Special Receive Condition status
Modified interrupt vector (Channel B only)
Function
Register pointers, CRC initialize, initialization commands for the
various modes and more
Transmit/Receive interrupt and data transfer mode definition
Interrupt vector (Channel B only)
Receive parameters and controls
Transmit/Receive miscellaneous parameters and modes
Transmit parameters and controls
Sync character or SDLC address field
Sync character or SDLC flag
Z80 CPU Peripherals
Serial Input/Output
User Manual
223

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