Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 140

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
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7. Enable DMA with the
Interrupts
The interrupt vector (WR4) must be written before interrupts using it can
occur, and interrupts must be enabled with the ENABLE INTERRUPTS
command at initialization or reinitialization. In a Z80 CPU environment,
interrupt service routines after DMA initialization usually include the
following commands at the end of the routine:
1. Interrupt on End-of-Block or Byte Match
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2.
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3.
4. Interrupt on Ready (before requesting the bus)
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ENABLE DMA
RETI
instruction
command
ENABLE DMA
command.
Direct Memory Access