Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 216
Z0847006PSG
Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z0847006PSG
Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z0847006PSG
Manufacturer:
Zilog
Quantity:
22
- Current page: 216 of 330
- Download datasheet (3Mb)
UM008101-0601
< % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Data Bus
D7–D0
*Timing Diagram Refers to Bit Mode Read
IORQ
Port
INT
RD
When reading the PIO, the data returned to the CPU is composed of output
register data from port data lines assigned as outputs and input register data
from port data lines assigned as inputs. The input register contains data that
was present immediately prior to the falling edge of RD. See Figure 10.
An interrupt is generated if interrupts from the port are enabled and the
data on the port data lines satisfies the logical equation defined is not
generated until a change occurs in the status of the logical equation. A
Mode 3 interrupt is generated only when the result of a Mode 3 logical
operation changes from false to true. For example, Mode 3 logical equa-
tion is an OR function. An unmasked port data line becomes active and an
interrupt is requested. If a second unmasked port data line becomes active
concurrently with the first, a new interrupt is not requested because a
change in the result of the Mode 3 logical operation has not occurred.
If the result of a logical operation becomes true immediately prior to or
during M1 an interrupt is requested after the trailing edge of M1
Figure 10.
Φ
Occurs Here
Data Match
Control Mode (Mode 3) Timing
Data Word 1
T
1
T
2
T
W
Data In
Data Word 2
*
T
3
Data Word 1 Placed on Bus
Parallel Input/Output
Related parts for Z0847006PSG
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Customer Procurement Spec(CPS)
Manufacturer:
ZILOG [Zilog, Inc.]
Datasheet:
Part Number:
Description:
Communication Controllers, ZILOG INTELLIGENT PERIPHERAL CONTROLLER (ZIP)
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
KIT DEV FOR Z8 ENCORE 16K TO 64K
Manufacturer:
Zilog
Datasheet:
Part Number:
Description:
KIT DEV Z8 ENCORE XP 28-PIN
Manufacturer:
Zilog
Datasheet:
Part Number:
Description:
DEV KIT FOR Z8 ENCORE 8K/4K
Manufacturer:
Zilog
Datasheet:
Part Number:
Description:
KIT DEV Z8 ENCORE XP 28-PIN
Manufacturer:
Zilog
Datasheet:
Part Number:
Description:
DEV KIT FOR Z8 ENCORE 4K TO 8K
Manufacturer:
Zilog
Datasheet:
Part Number:
Description:
CMOS Z8 microcontroller. ROM 16 Kbytes, RAM 256 bytes, speed 16 MHz, 32 lines I/O, 3.0V to 5.5V
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
Low-cost microcontroller. 512 bytes ROM, 61 bytes RAM, 8 MHz
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
Z8 4K OTP Microcontroller
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
CMOS SUPER8 ROMLESS MCU
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
SL1866 CMOSZ8 OTP Microcontroller
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
SL1866 CMOSZ8 OTP Microcontroller
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
OTP (KB) = 1, RAM = 125, Speed = 12, I/O = 14, 8-bit Timers = 2, Comm Interfaces Other Features = Por, LV Protect, Voltage = 4.5-5.5V
Manufacturer:
Zilog, Inc.
Datasheet: