Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 130

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
the DMA, reinitialization of the status bits may remove the condition that
stopped the DMA and the DMA might immediately request the bus again if
it is not disabled. (The REINITIALIZE STATUS BYTE command in WR6
is similar in this respect to the WR0 byte when transfer direction is being
changed: both of these control bytes must be preceded by some other
control bytes to ensure that the DMA is disabled.)
The interrupt pending status (bit 3) of the status bytes can be reinitialized by
acknowledging the interrupt, servicing it, and writing a RESET AND
DISABLE INTERRUPTS command. The DMA operation status (bit 0) can
be reinitialized with a LOAD command.
Read Mask Follows (BB)
This command points to the read mask (Figure 46). It allows the next control
byte written to the DMA to go to the read mask register. The read mask is
used to set a new sequence, for reading the read registers, RR0 through RR6,
and it is normally part of the power-up initialization of the DMA.
The read registers are always read in a fixed sequence beginning with RR0
and ending with RR6. However, the registers read in this sequence can be
limited by programming the read mask. The read mask is programmed with
1s in the bit positions associated with the registers to be read. For example,
if the read mask contains
in the following order:
When the read mask has been programmed, it must be initialized to begin at
the lowest-order register selected. Do this with the
SEQUENCE
1. Status byte (RR0)
2. Port A address counter, low byte (RR3)
3. Port A address counter, high byte (RR4)
command.
0001 1001
, the following read registers are read
INITIATE READ
Direct Memory Access