Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 131

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
Initiate Read Sequence (A7)
This command initiates the read-sequence pointer command, allowing the
next CPU read instruction to the DMA access to the first (low-order) read
register designated as readable by the read mask. When started, the read
sequence specified by the read mask must be completed before, for
example, giving another INITIATE READ SEQUENCE or a READ
STATUS BYTE command.
Registers do not need to be read immediately after writing the
READ SEQUENCE
SEQUENCE
bus-request/bus release cycles before executing the first read and subse-
quent reads.
Force ReadY (B3)
This command, in Burst or Continuous mode, forces an internal Ready
condition to take the place of an external active Ready signal. It is used for
memory-to-memory transfers and memory searches where no Ready line is
necessary. Ready active High/Low (bit 3 of WR5) need not be considered
when this command is used. The FORCE READY condition is unforced by
the following commands and conditions:
Because bus release by the DMA unforces the Ready condition, this
command allows the DMA to transfer only one byte in the byte mode.
•
•
•
•
•
•
and
RESET
LOAD
RESET AND DISABLE INTERRUPTS
End-of-block termination
Byte-match termination
Bus release by DMA
READ STATUS BYTE
command. Other commands (except
command
command
) can be written and can go through
command
<   % 2 7 2 G T K R J G T C N U
Direct Memory Access
INITIATE READ
7 U G T / C P W C N
INITIATE