Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 13

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Z80 CPU Peripherals
User Manual
xiii
Parallel Input/Output (continued)
Figure 98. Example of I/O Interface . . . . . . . . . . . . . . . . . . . . . . . . . .201
Figure 99. Control Mode Application . . . . . . . . . . . . . . . . . . . . . . . .204
Serial Input/Output
Figure 100. Z80 SIO Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . .209
Figure 101. Z80 SIO/0 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .214
Figure 102. Z80 ZIO/0 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . .215
Figure 103. Z80 SIO/1 Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . .216
Figure 104. Z80 ZIO/1 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . .217
Figure 105. Z80 SIO/2 Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . .218
Figure 106. Z80 ZIO/2 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . .219
Figure 107. Z80 SIO/3 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . .220
Figure 108. Z80 SIO/4 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . .221
Figure 109. Transmit and Receive Data Path . . . . . . . . . . . . . . . . . . . .226
Figure 110. Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .230
Figure 111. Asynchronous Message Format . . . . . . . . . . . . . . . . . . . .231
Figure 112. Synchronous Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . .239
Figure 113. Transmit/Receive SDLC/HDLC Message Format . . . . . .256
Figure 114. Write Register 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .274
Figure 115. Write Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .279
Figure 116. Write Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .282
Figure 117. Write Register 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .284
Figure 118. Write Register 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .286
Figure 119. Write Register 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .289
Figure 120. Write Register 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .290
Figure 121. Write Register 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .291
Figure 122. Read Register 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .294
Figure 123. Read Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .299
List of Figures
UM008101-0601