Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 37
Z0847006PSG
Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z0847006PSG
Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 5. Channel Control Register
UM008101-0601
Bit
Number
7
6
5
*TIMER mode only
7
Interrupt
R/W
Loading The Channel Control Register
Field
Interrupt
Mode
Prescaler Value*
6
Mode
R/W
automatic features in the interrupt control logic, one pre-programmed
interrupt vector suffices for all four channels.
To load a Channel Control Word, the CPU performs a normal I/O Write
sequence to the port address corresponding to the desired CTC channel. The
CTC input pins CS0 and CS1 are used to form a 2-bit binary address to select
one of four channels within the device. (See Table 2 on page 5.) In many
system architectures, these two input pins are connected to Address Bus lines
A0 and A1, respectively, so that the four channels in a CTC device occupy
contiguous I/O port addresses. A word written to a CTC channel is
interpreted as a channel control word, and loaded into the channel control
register (bit 0 is a logic 1). The other seven bits of this word select operating
modes and conditions as indicated in Table 2.
5
Prescaler
Value*
R/W
R/W Value Description
R/W
R/W
R/W
4
CLK/TRG
Section
R/W
1
0
1
0
1
0
Enable Interrupt
Disable Interrupt
COUNTER Mode
TIMER Mode
256
16
3
Time
Trigger*
R/W
2
Time
Constant
R/W
Counter/Timer Channels
< % 2 7 2 G T K R J G T C N U
1
Reset
R/W
7 U G T / C P W C N
0
Control or
Vector
R/W
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