Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 184

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
BUSREQ
<   % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
A15–A0
D7–D0
MREQ
BAI
RD
RDY
Figure 72.
Variable Cycle and Edge Timing
The Z80 DMA’s operation-cycle length, without Wait states for the source
(read) port and destination (write) port, can be independently programmed.
This variable-cycle feature allows read or write cycles consisting of two,
three, or four clock cycles, more if Wait cycles are inserted, increasing or
decreasing the pulse widths of all signals generated by the DMA. In addi-
tion, the trailing edges of the IORQ, MREQ, RD, and WR signals can be
independently terminated one-half cycle early. See Figure 73 .
RDY Line in Continuous Mode
Direct Memory Access