Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 135

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
Figure 47.
Byte Counter (RR1, RR2)
This 16-bit counter is cleared to 0 by the LOAD, CONTINUE, and RESET
commands only. When the DMA begins transferring or searching, the byte
counter increments by one at the end of each read cycle and the byte counter
is compared with the programmed contents of the block length register,
determining end-of-block. The number of bytes read in a transfer always
equals the number of bytes written because the DMA completes any transfer
it starts, even when stopping on byte matches in transfer/search operations.
Read Register 1
Read Register 2
Read Register 3
Read Register 4
Read Register 5
Read Register 6
D7 D6 D5 D4 D3 D2 D1 D0
X
X
Read Register 0 through Read Register 6
Status Byte
Byte Counter (Low Byte)
Byte Counter (High Byte)
Port A Address Counter (Low Byte)
Port A Address Counter (High Byte)
Port B Address Counter (Low Byte)
Port B Address Counter (High Byte)
1 = DMA Operation has Occurred
0 = Ready Active
0 = Interrupt Pending
0 = Match Found
0 = End-of-Block
<   % 2 7 2 G T K R J G T C N U
Direct Memory Access
7 U G T / C P W C N