Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 109

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 13. DMA Status
UM008101-0601
Description
Can the CPU
write DMA
control bytes
or read DMA
status bytes?
External
actions that
cause the
state
DMA
commands
(WR6 control
bytes)
causing the
state
DISABLED
DMA cannot request the bus (cannot pull
its BUSREQ input to CPU low).
Yes
Power-down
Any command except the ENABLE DMA
command. (And the REINITIALIZE
STATUS BYTE command, if it is not
preceded by another command.) The
DISABLE DMA command is specifically
designed for this situation.
chapter. It is not possible for the DMA to program itself by directing
transfers of control bytes from memory to its own internal registers.
When DMA interrupt vectors are used in a Z80 environment, the Z80 CPU
should be programmed for Mode-2 maskable interrupts.
Inactive (Stopped) Suspended Operating
DMA can request the bus
and may have had the bus
immediately prior to this
state, but it is not
currently the bus master.
Yes, but first write a
DISABLE DMA
command
End-of-block in any
mode, except with Auto
Restart. Byte Match in
any mode. Byte or Burst
mode BAI line inactive.
Loss of power.
ENABLE DMA if RDY
line is inactive and the
FORCE READY
command is not used.
ENABLED
DMA is bus
master but no
operations are
taking place.
No
RDY line
inactive in
Continuous
mode.
ENABLE
DMA, if RDY
line is inactive
in Continuous
mode.
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Direct Memory Access
ACTIVE
DMA is bus master
and is transferring and/
or searching in one of
three modes: Byte,
Burst, or Continuous
No
RDY line active in
Burst mode, if DMA is
enabled. RETI
instruction fetched by
CPU, if DMA is
enabled and RDY line
is active.
ENABLE DMA, if
RDY is active or the
FORCE is used and
the command is
outside an interrupt
service routine.
7 U G T / C P W C N