Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 281
Z0847006PSG
Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z0847006PSG
Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z0847006PSG
Manufacturer:
Zilog
Quantity:
22
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UM008101-0601
7. The CPU immediately issues a Send Abort Command WR0 to the
8. The Z80 SIO sends the Abort sequence by destroying whatever data
As this sequence describes, the CPU has a protection of 22 minimum and
30 maximum transmit clock cycles.
SDLC CRC Generation
Reset the CRC generator to all 1s at the beginning of each frame before
CRC accumulation begins. Actual accumulation begins when the program
sends the address field (eight bits) to the Z80 SIO. Although the Z80 SIO
automatically transmits one flag character following the Transmit Enable,
send a few more flag characters ahead of the message to ensure that char-
acter synchronization occurs at the receiving end. Synchronization is
accomplished by externally timing out after enabling the transmitter, and
before loading the first character.
The Transmit CRC Enable (WR5, D0) must be enabled before sending the
address field. In the SDLC mode, all the characters between the opening
and closing flags are included in CRC accumulation, and the CRC gener-
ated in the Z80 SIO transmitter is inverted before it is sent on the line.
Transmit Termination
If the transmitter is disabled while a character is being sent, that Character
(data or flag) is sent, but is followed by a marking line rather than CRC or
flag characters.
A character in the buffer while the transmitter is disabled, remains in the
buffer; however, a programmed Abort sequence executes when it is written
to the control register. Characters being transmitted, if any, are lost. In the
case of CRC, the 16-bit transmission is completed if the transmitter is
disabled; however, flags are sent in place of CRC.
Z80 SIO.
(CRC, data, or flag) is being sent.
Z80 CPU Peripherals
Serial Input/Output
User Manual
261
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