Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 299

• Manufacturer Part Number: Z0847006PSG
• Description: IC 6MHZ Z80 NMOS DART 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z0847006PSG

• Processor Type: Z80
• Features: Dual Channel Asynchronous Receiver/Transmitter (DART)
• Speed: 6MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Mounting Style: Through Hole
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 847006
• Rohs Compliant: Yes
• Clock Frequency: 6MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UM008101-0601
Figure 115. Write Register 1
Table 17. Receive Interrupt Modes
Wait/Ready Function Selection (D7-D5). The Wait and Ready functions are
selected by controlling D5, D6, and D7. Wait/Ready function is enabled by
setting Wait/Ready Enable (WR1, D7) to 1. The Ready function is selected
by setting D5 (Wait/Ready function) to 1. If this bit is 1, the WAIT/READY
output switches from High to Low when the Z80 SIO is ready to transfer
D4
Receive
Interrupt Mode
1
0
0
1
1
D7
D6
D5
D3
Receive
Interrupt Mode
0
0
1
0
1
D4
0
0
1
1
Wait/Ready on R/T
Wait/Ready Function
Wait/Ready Enable
D3
0
1
0
1
Rx INT Disable
Rx INT on First Character
INT on All Rx Characters (Parity Affects Vector)
INT on All Rx Characters (Parity Does Not Affect Vector)
D2
D1
Result
Receive Interrupts Disabled
Receive Interrupt On First Character Only
Interrupt On All Receive Characters
parity error is a Special Receive condition
Interrupt On All Receive Characters
parity error is not a Special Receive
condition
D0
EXE INT Enable
Tx INT Enable
Status Affects Vector
(CH.B Only)
Z80 CPU Peripherals
Serial Input/Output
*Or on special condition
User Manual
−
−
*
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