UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 1001

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
Remark “Classification” in the above table classifies revisions as follows.
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
CHAPTER 15 SERIAL INTERFACE IICA
p.593
p.595
p.598
p.602
pp.651 to 665
CHAPTER 16 LCD CONTROLLER/DRIVER
p.689
pp.708, 709
pp.709, 710
CHAPTER 18 DMA CONTROLLER
p.726
p.731
pp.732 to 735
p.740
pp.741, 742
pp.743, 744
CHAPTER 19 INTERRUPT FUNCTIONS
p.745
CHAPTER 26 OPTION BYTE
p.835
p.838
CHAPTER 27 FLASH MEMORY
p.841
p.855
CHAPTER 29 BCD CORRECTION CIRCUIT
p.860
CHAPTER 30 INSTRUCTION SET
pp.880, 881
CHAPTER 31 ELECTRICAL SPECIFICATIONS
Throughout
pp.883, 884
p.885
pp.887 to 889
pp.894, 896,
897, 899
p.902
p.907
Page
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
Addition of description to Caution of Figure 15-6. Format of IICA Control Register 0 (IICCTL0) (4/4)
Addition of description to Note of Figure 15-7. Format of IICA Status Register (IICS) (2/3)
Addition of Note to Figure 15-9. Format of IICA Control Register 1 (IICCTL1) (1/2)
Change of 15.4.2 Setting transfer clock by using IICWL and IICWH registers
Change of 15.6 Timing Charts
Addition of example of calculation of LCD frame frequency to (c) and (d) of Figure 16-13.
Common Signal Waveforms (2/2)
Change of Caution of Figure 16-31. Examples of LCD Drive Power Connections (External
Resistance Division Method)
Change the capacitance value of external capacitors to 0.47
boosting method and 16.8.3 Capacitor split method
Addition of Note to Figure 18-4. Format of DMA Mode Control Register n (DMCn) (1/2)
Change of description of Figure 18-7. Example of Setting for CSI Consecutive Transmission
Addition of 18.5.2 CSI master reception and 18.5.3 CSI transmission/reception
Change of 18.5.6 Holding DMA transfer pending by DWAITn and addition of Caution
Change of 18.5.7 Forced termination by software
Change of 18.6 Cautions on Using DMA Controller
Change value of maskable interrupts of 78K0R/LF3
Change of Figure 26-1. Format of User Option Byte (000C0H/010C0H) (1/2)
Change of 26.4 Setting of Option Byte
Addition of Figure 27-3. Example of Wiring Adapter for Flash Memory Writing (
Addition of 27.9 Creating ROM Code to Place Order for Previously Written Product
Change of Examples 2 in 29.3 BCD Correction Circuit Operation
Change of Table 30-5. Operation List
Deletion of (TARGET)
Change of analog output voltage, output current, high, and output current, low in Absolute
Maximum Ratings (T
Change of Internal Oscillator Characteristics
Addition of Recommended oscillator circuit constants
Change of output voltage, low (V
Change of Caution of (1) Basic operation (3/6) in AC Characteristics
Change of (b) During communication at same potential (CSI mode) (master mode, SCKp...
internal clock output) of (2) Serial interface: Serial array unit (2/18) and addition of Note 1
A
= 25°C)
OL2
), supply current, and operating current of DC Characteristics
Description
μ
F±30% in 16.8.2 Internal voltage
APPENDIX D REVISION HISTORY
μ
PD78F1508A)
Classification
(b), (c)
(c)
(c)
(c)
(c)
(b)
(c)
(c)
(b)
(c)
(c)
(c)
(c)
(c)
(c)
(a)
(b)
(b)
(c)
(b)
(a)
(c)
(b)
(b)
(b)
(b)
(b)
(c)
(2/3)
1001

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