UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 103

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Note The value of this register is 00H if the AMPM bit (bit 3 of the RTCC0 register) is set to 1 after reset.
Address
FFF5CH D/A converter mode register
FFF64H
FFF65H
FFF66H
FFF67H
FFF68H
FFF69H
FFF6AH
FFF6BH
FFF6CH
FFF6DH
FFF6EH
FFF6FH
FFF70H
FFF71H
FFF72H
FFF73H
FFF74H
FFF75H
FFF76H
FFF77H
FFF90H
FFF91H
FFF92H
FFF93H
FFF94H
FFF95H
FFF96H
FFF97H
FFF98H
FFF99H
FFF9AH
FFF9BH
FFF9CH Alarm week register
Timer data register 02
Timer data register 03
Timer data register 04
Timer data register 05
Timer data register 06
Timer data register 07
Timer data register 10
Timer data register 11
Timer data register 12
Timer data register 13
Sub-count register
Second count register
Minute count register
Hour count register
Week count register
Day count register
Month count register
Year count register
Watch error correction register
Alarm minute register
Alarm hour register
Special Function Register (SFR) Name
Table 3-5. SFR List (3/5)
DAM
TDR02
TDR03
TDR04
TDR05
TDR06
TDR07
TDR10
TDR11
TDR12
TDR13
RSUBC
SEC
MIN
HOUR
WEEK
DAY
MONTH
YEAR
SUBCUD
ALARMWM
ALARMWH
ALARMWW
Symbol
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Manipulable Bit Range
1-bit
√
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
CHAPTER 3 CPU ARCHITECTURE
8-bit
√
−
−
−
−
−
−
−
−
−
−
−
√
√
√
√
√
√
√
√
√
√
√
16-bit
−
√
√
√
√
√
√
√
√
√
√
√
−
−
−
−
−
−
−
−
−
−
−
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
0000H
12H
Reset
After
00H
00H
00H
00H
01H
01H
00H
00H
00H
12H
00H
Note
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
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