UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 848

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
27.7 Security Settings
internal flash memory, so that the program cannot be changed by an unauthorized person.
programming mode is set next.
setting when the flash memory is shipped. Security can be set by on-board/off-board programming and self programming.
Each security setting can be used in combination.
security function is enabled.
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
The 78K0R/Lx3 microcontrollers support a security function that prohibits rewriting the user program written to the
The operations shown below can be performed using the Security Set command. The security setting is valid when the
• Disabling batch erase (chip erase)
• Disabling block erase
• Disabling write
• Disabling rewriting boot cluster 0
The batch erase (chip erase), block erase, write commands, and rewriting boot cluster 0 are enabled by the default
All the security settings are cleared by executing the batch erase (chip erase) command.
Table 27-6 shows the relationship between the erase and write commands when the 78K0R/Lx3 microcontrollers
Remark To prohibit writing and erasing during self-programming, use the flash sealed window function (see 27.8.2 for
Execution of the block erase and batch erase (chip erase) commands for entire blocks in the flash memory is
prohibited by this setting during on-board/off-board programming. Once execution of the batch erase (chip erase)
command is prohibited, all of the prohibition settings (including prohibition of batch erase (chip erase)) can no longer
be cancelled.
Execution of the block erase command for a specific block in the flash memory is prohibited during on-board/off-board
programming. However, blocks can be erased by means of self programming.
Execution of the write and block erase commands for entire blocks in the flash memory is prohibited during on-
board/off-board programming. However, blocks can be written by means of self programming.
Execution of the batch erase (chip erase) command, block erase command, and write command on boot cluster 0
(00000H to 00FFFH) in the flash memory is prohibited by this setting.
Caution If a security setting that rewrites boot cluster 0 has been applied, boot cluster 0 of that device will
Caution After the security setting for the batch erase is set, erasure cannot be performed for the device. In
detail).
not be rewritten, and the entire flash memory of the device will not be erased in batch.
addition, even if a write command is executed, data different from that which has already been
written to the flash memory cannot be written, because the erase command is disabled.
CHAPTER 27 FLASH MEMORY
848

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