UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 974

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Real-time
counter
Watchdog
timer
Function
HOUR: Hour
count register
WEEK: Week
count register
WDTE:
Watchdog timer
enable register
RTCC1: Real-
time counter
control register 1
RTCC2: Real-
time counter
control register 2
RSUBC: Sub-
count register
ALARMWM:
Alarm minute
register
ALARMWH:
Alarm hour
register
Reading/writing
real-time counter
Details of
Function
If writing is performed to the RTCC1 register with a 1-bit manipulation instruction, the
RIFG and WAFG flags may be cleared. Therefore, to perform writing to the RIFG and
WAFG flags, be sure to use an 8-bit manipulation instruction. At this time, set 1 to the
RIFG and WAFG flags to invalidate writing and not to clear the RIFG and WAFG flags
during writing. When the value may be rewritten because the RIFG and WAFG flags
are not being used, the RTCC1 register may be written by using a 1-bit manipulation
instruction.
Change ICT2, ICT1, and ICT0 when RINTE = 0.
When the output from RTCDIV pin is stopped, the output continues after a maximum
of two clocks of f
output is stopped immediately after entering the high level, a pulse of at least one
clock width of f
After the real-time counter starts operating, the output width of the RTCDIV pin may
be shorter than as set during the first interval period.
When a correction is made by using the SUBCUD register, the value may become
8000H or more.
This register is also cleared by reset effected by writing the second count register.
The value read from this register is not guaranteed if it is read during operation,
because a value that is changing is read.
Bit 5 (HOUR20) of HOUR indicates AM(0)/PM(1) if AMPM = 0 (if the 12-hour system
is selected).
The value corresponding to the month count register or the day count register is not
stored in the week count register automatically. After reset release, set the week
count register as follow.
Set a decimal value of 00 to 59 to this register in BCD code. If a value outside the
range is set, the alarm is not detected.
Set a decimal value of 00 to 23, or 01 to 12 and 21 to 32 to this register in BCD code.
If a value outside the range is set, the alarm is not detected.
Bit 5 (WH20) of ALARMWH indicates AM(0)/PM(1) if AMPM = 0 (if the 12-hour
system is selected).
Complete the series of operations of setting RWAIT to 1 to clearing RWAIT to 0 within
1 second.
If a value other than “ACH” is written to WDTE, an internal reset signal is generated.
If a 1-bit memory manipulation instruction is executed for WDTE, an internal reset
signal is generated.
The value read from WDTE is 9AH/1AH (this differs from the written value (ACH)).
SUB
XT
may be generated.
and enters the low level. While 512 Hz is output, and when the
Cautions
APPENDIX C LIST OF CAUTIONS
p.358
p.359
p.359
p.359
p.360
p.360
p.360
p.361
p.363
p.366
p.366
p.366
pp.371
, 372
p.383
p.383
p.383
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