UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 803

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
23.1 Functions of Power-on-Clear Circuit
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
The power-on-clear circuit (POC) is mounted onto all 78K0R/Lx3 microcontroller products.
The power-on-clear circuit has the following functions.
• Generates internal reset signal at power on.
• Compares supply voltage (V
The reset signal is released when the supply voltage (V
Caution If an internal reset signal is generated in the POC circuit, the reset control flag register (RESF) is
Remark This product incorporates multiple hardware functions that generate an internal reset signal. A flag that
Caution If the low-voltage detector (LVI) is set to ON by an option byte by default, the reset signal is not
when V
Note
DD
These are preliminary values and subject to change.
released until the supply voltage (V
< V
cleared to 00H.
indicates the reset source is located in the reset control flag register (RESF) for when an internal reset
signal is generated by the watchdog timer (WDT), low-voltage-detector (LVI), or illegal instruction
execution. RESF is not cleared to 00H and the flag is set to 1 when an internal reset signal is generated
by WDT or LVI.
For details of RESF, see CHAPTER 22 RESET FUNCTION.
PDR
.
CHAPTER 23 POWER-ON-CLEAR CIRCUIT
DD
) and detection voltage (V
DD
) exceeds 2.07 V ±0.2 V
DD
) exceeds 1.61 V ±0.09 V
PDR
= 1.59 V ±0.09 V
CHAPTER 23 POWER-ON-CLEAR CIRCUIT
Note
.
Note
Note
), generates internal reset signal
.
803

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