UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 673

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Symbol
Address: FFF41H
LCDM
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Cautions 1. When LCD display is not performed or necessary, set SCOC and VLCON to 0, in order to reduce
Other than above
LCDON
LCDON
VLCON
LCDM2
BLON
<7>
0
0
1
1
0
0
1
1
0
0
0
0
1
1
0
1
2. When the external resistance division method has been set (MDSET1 = MDSET0 = 0), do not set
3. Set BLON and LCDSEL to 0 when 8 has been selected as the number of time slices for the
4. To use the internal voltage boosting method, specify the reference voltage by using the VLCD
After reset
power consumption.
VLCON to 1.
display mode.
register (or perform a reset to use the default value of the reference voltage), wait for the
reference voltage setup time (2 ms (min.)), and then set VLCON to 1.
Stops voltage boost circuit or capacitor split circuit operation
Enables voltage boost circuit or capacitor split circuit operation
LCDSEL
LCDM1
SCOC
SCOC
<6>
0
1
0
1
0
1
0
1
0
0
1
1
0
1
:
00H
Figure 16-3. Format of LCD Display Mode Register (LCDM)
R/W
Output ground level to segment/common pin
Display off (all segment outputs are deselected.)
Output ground level to segment/common pin
Display on
Displaying an A-pattern area data (lower four bits of LCD display data memory)
Displaying a B-pattern area data (higher four bits of LCD display data memory)
Alternately displaying A-pattern and B-pattern area data (blinking display corresponding to
the constant-period interrupt (INTRTC) timing of the real-time counter (RTC))
VLCON
Voltage boost circuit or capacitor split circuit operation enable/disable
LCDM0
<5>
0
1
0
1
0
1
4
3
2
3
Static
8
Setting prohibited
Number of
time slices
External resistance
BLON
division method
<4>
1/3
1/3
1/2
1/2
1/4
Bias mode Number of
LCD controller/driver display mode selection
LCD display enable/disable
Display data area control
LCDSEL
<3>
CHAPTER 16 LCD CONTROLLER/DRIVER
Setting prohibited
4
3
4
4
8
time slices
boosting method
Internal voltage
LCDM2
2
1/3
1/3
1/3
1/3
1/4
Bias mode Number of
LCDM1
4
3
4
4
4
time slices
Capacitor split method
1
1/3
1/3
1/3
1/3
1/3
Bias mode
LCDM0
0
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