UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 123

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
3.4.7 Based addressing
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
[Function]
[Operand format]
Based addressing uses the contents of a register pair specified with the instruction word as a base address, and 8-
bit immediate data or 16-bit immediate data as offset data. The sum of these values is used to specify the target
address.
Identifier
−
−
−
−
−
−
OP code
[HL + byte], [DE + byte], [SP + byte] (only the space from F0000H to FFFFFH is specifiable)
word[B], word[C] (only the space from F0000H to FFFFFH is specifiable)
word[BC] (only the space from F0000H to FFFFFH is specifiable)
ES:[HL + byte], ES:[DE + byte] (higher 4-bit addresses are specified by the ES register)
ES:word[B], ES:word[C] (higher 4-bit addresses are specified by the ES register)
ES:word[BC] (higher 4-bit addresses are specified by the ES register)
byte
Figure 3-27. Example of [SP+byte]
SP
Description
Target memory
Memory
CHAPTER 3 CPU ARCHITECTURE
FFFFFH
F0000H
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