UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 342

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
TAU
default
setting
Channel
default
setting
Remarks 1.
Sets the TAU0EN or TAU1EN bits of the PER0 register
to 1.
Sets the TPSm register.
Sets the TMRmn and TMRmp registers of two channels
to be used (determines operation mode of channels).
An output delay is set to the TDRmn register of the
master channel, and a pulse width is set to the TDRmp
register of the slave channel.
2.
3.
Determines clock frequencies of CKm0 and CKm1.
Sets slave channel.
The TOMmp bit of the TOMm register is set to 1
(combination operation mode).
Sets the TOLmp bit.
Sets the TOmp bit and determines default level of the
TOmp output.
Sets TOEmp to 1 and enables operation of TOmp.
Clears the port register and port mode register to 0.
78K0R/LF3:
• m = 0, n = 0, 2, 6, p = n+1, TO00 to TO04, and TO07 pins
• Channel 6 of timer array unit 0 can output a one-shot pulse only when software trigger start is selected
78K0R/LG3:
• m = 0, n = 0, 2, 4, 6, p = n+1, TO00 to TO07 pins
78K0R/LH3:
• m = 0, n = 0, 2, 4, 6, p = n+1, TO00 to TO07 pins
• m = 1, n = 0, 2, p = n+1, TO10 to TO13 pins
and it is used as the master channel (because the TI06 pin is not provided).
Figure 6-66. Operation Procedure of One-Shot Pulse Output Function (1/2)
Software Operation
Power-off status
Power-on status. Each channel stops operating.
Channel stops operating.
(Clock is supplied and some power is consumed.)
The TOmn pin goes into Hi-Z output state.
The TOmn default setting level is output when the port
mode register is in output mode and the port register is 0.
TOmp does not change because channel stops operating.
The TOmp pin outputs the TOmp set level.
(Clock supply is stopped and writing to each register is
disabled.)
(Clock supply is started and writing to each register is
enabled.)
CHAPTER 6 TIMER ARRAY UNIT
Hardware Status
342