UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 30

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Operational amplifier
Voltage reference
Serial
interface
LCD controller/driver
Multiplier/divider
DMA controller
Vectored interrupt
sources
Key interrupt
Reset
Power-on-clear circuit
Low-voltage
detector
On-chip debug function
BCD adjustment
Power supply voltage
Operating ambient temperature
Package
Notes 1. The values in parentheses are the number of signal outputs when 8com is used.
2. When instruction code FFH is executed.
UART supporting
LIN-bus
CSI/UART/ simplified I
CSI/UART
CSI (2 ch) /UART
Multimaster I
Segment signal output
Common signal output
V
EXLVI voltage detector 1.21 V
Reset by the illegal instruction execution not issued by emulation with the in-circuit emulator or on-chip
debug emulator.
DD
Item
voltage detector
Internal
External
2
C
2
C
31 (27)
• 80-pin plastic LQFP
• 80-pin plastic LQFP (fine
2 channels
μ
F1500
2.0 V/2.5 V
1
2
−
−
−
Internal voltage boosting method, capacitor split method, and external resistance division
method are switchable.
4 (8)
16 bits × 16 bits = 32 bits (multiplication), 32 bits ÷ 32 bits = 32 bits, 32-bit remainder
(division)
2 channels
30
8
−
• Reset by RESET pin
• Internal reset by watchdog timer
• Internal reset by power-on-clear
• Internal reset by low-voltage detector
• Internal reset by illegal instruction execution
• Power-on-reset:
• Power-down-reset: 1.59 ±0.09 V
1.91 V to 4.22 V (16 stages)
Provided
V
T
A
DD
(14x14)
pitch) (12x12)
PD78
= −40 to +85°C
= 1.8 to 5.5 V
Note 1
Note 1
78K0R/LF3
μ
F1501
PD78
μ
F1502
1.61 ±0.09 V
PD78
40 (36)
μ
F1503
3 channels
1
−
1
33
12
100-pin plastic LQFP (fine
pitch) (14x14)
PD78
Note 1
78K0R/LG3
μ
F1504
PD78
Note 2
μ
F1505
PD78
54 (50)
μ
F1506
−
1
33
13
Key interrupt (INTKR) occurs
by detecting falling
the
KR7).
128-pin plastic LQFP (fine
pitch) (14x20)
PD78
key input pins (KR0 to
CHAPTER 1 OUTLINE
Note 1
78K0R/LH3
μ
F1507
PD78
edge of
μ
F1508
PD78
(2/2)
30