UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 999

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Electrical
specifications
Recommended
soldering
condition
Function
During
communication
at different
potential (2.5 V,
3 V) (CSI mode)
(master mode,
SCKp... internal
clock output)
During
communication
at different
potential (2.5 V,
3 V) (CSI mode)
(slave mode,
SCKp... external
clock input)
During
communication
at different
potential (2.5 V,
3 V) (simplified
I
VR circuit
2
C mode)
Details of
Function
−
Select the TTL input buffer for SIp and the N-ch open drain output (V
mode for SOp and SCKp by using the PIMg and POMx registers.
Select the TTL input buffer for SIp and SCKp and the N-ch open drain output (V
tolerance) mode for SOp by using the PIMg and POMx registers.
Select the TTL input buffer and the N-ch open drain output (V
SDAr and the N-ch open drain output (V
PIMg and POMx registers.
Connect the V
μ
(capacitance: 0.1
The
for development and evaluation. Do not use the on-chip debug function in products
designated for mass production, because the guaranteed number of rewritable times
of the flash memory may be exceeded when this function is used, and product
reliability therefore cannot be guaranteed. Renesas Electronics is not liable for
problems occurring when the on-chip debug function is used.
F±30 %, ESR: 2 Ω (max.), ESL: 10 nH (max.)) and a ceramic capacitor
μ
PD78F1500A to 78F1508A have an on-chip debug function, which is provided
REFOUT
μ
F±30 %, ESR: 2 Ω (max.), ESL: 10 nH (max.)).
pin to GND via a tantalum capacitor (capacitance: 10
Cautions
DD
tolerance) mode for SCLr by using the
APPENDIX C LIST OF CAUTIONS
DD
tolerance) mode for
DD
tolerance)
DD
to 918
921
pp.916
pp.920,
pp.922,
923
p.927
pp.942,
943
Page
(39/39)
999