UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 823

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Notes 1.
Remarks 1. <1> to <8> in Figure 24-8 above correspond to <1> to <8> in the description of “When starting
Supply voltage (V
V
V
Internal reset signal
POR
PDR
(set by software)
(set by software)
(set by software)
(set by software)
= 1.61 V (TYP.)
= 1.59 V (TYP.)
LVISEL flag
2.
3.
LVIMK flag
LVIMD flag
LVION flag
LVIIF flag
LVIF flag
2. V
The LVIMK flag is set to “1” by reset signal generation.
The interrupt request signal (INTLVI) is generated and the LVIF and LVIIF flags may be set (1).
If LVI operation is disabled when the supply voltage (V
(V
INTLVI
LVI
V
operation” in 24.4.2 (1) (a) When LVI default start function stopped is set (LVIOFF = 1).
V
DD
LVI
), an interrupt request signal (INTLVI) is generated and LVIIF may be set to 1.
POR
PDR
)
Figure 24-8. Timing of Low-Voltage Detector Interrupt Signal Generation
: POC power supply rise detection voltage
: POC power supply fall detection voltage
L
L
<2>
Note 1
<1>
Note 2
Note 2
Note 2
<4>
<7>
Cleared by software
<6>
(Bit: LVISEL = 0, Option Byte: LVIOFF = 1)
<3>
<8> Cleared by software
<5> Wait time
Note 3
Note 3
DD
CHAPTER 24 LOW-VOLTAGE DETECTOR
) is less than or equal to the detection voltage
Time
823

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