UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 965

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Port
functions
Clock
generator
Function
Port 11
P121 to P124
Port 15
Port mode
register
(78K0R/LF3)
Port mode
register
(78K0R/LG3)
Port mode
register
(78K0R/LH3)
ADPC: A/D port
configuration
register
PFALL: Port
function register
ISC: Input switch
control register
1-bit
manipulation
instruction for
port register n
(Pn)
CMC: Clock
operation mode
control register
Details of
Function
Make the AV
as a digital port.
The function setting on P121 to P124 is available only once after the reset release.
The port once set for connection to an oscillator cannot be used as an input port
unless the reset is performed.
Make the AV
as a digital port.
Be sure to set bits 3 to 7 of PM0, bits 6, 7 of PM1, bit 7 of PM2, bits 4 to 7 of PM3,
bits 2 to 7 of PM4, bits 3 to 7 of PM9, bits 1 to 7 of PM10, bits 2 to 7 of PM11, bits 1
to 7 of PM12, and bits 0 to 6 of PM15 to 1.
Be sure to set bits 3 to 7 of PM0, bit 7 of PM1, bits 5 to 7 of PM3, bits 2 to 7 of PM4,
bits 2 to 7 of PM6, bits 3 to 7 of PM8, bits 1 to 7 of PM10, bits 2 to 7 of PM11, bits 1
to 7 of PM12, and bits 3 to 6 of PM15 to 1.
Be sure to set bits 3 to 7 of PM0, bits 5 to 7 of PM3, bits 2 to 7 of PM4, bits 2 to 7 of
PM6, bits 3 to 7 of PM10, bits 2 to 7 of PM11, bits 1 to 7 of PM12, and bits 3 to 6 of
PM15 to 1.
Set the channel used for A/D conversion to the input mode by using port mode
registers 2 and 15 (PM2, PM15).
Do not set the pin that is set by ADPC as digital I/O by analog input channel
specification register (ADS).
For 78K0R/LF3, bits 3 and 7 must be set to 0. For 78K0R/LG3 and 78K0R/LH3, bit 7
must be set to 0.
Be sure to clear bits 5 to 7 to “0”.
When a 1-bit manipulation instruction is executed on a port that provides both input
and output functions, the output latch value of an input port that is not subject to
manipulation may be written in addition to the targeted bit.
recommended to rewrite the output latch when switching a port from input mode to
output mode.
CMC can be written only once after reset release, by an 8-bit memory manipulation
instruction.
After reset release, set CMC before X1 or XT1 oscillation is started as set by the
clock operation status control register (CSC).
Be sure to set AMPH to 1 if the X1 clock oscillation frequency exceeds 10 MHz.
To use CMC with its initial value (00H), be sure to set it to 00H after releasing reset in
order to prevent malfunction when a program loop occurs.
DD1
DD0
pin the same potential as the EV
pin the same potential as the EV
Cautions
DD
APPENDIX C LIST OF CAUTIONS
DD
or V
or V
DD
DD
pin when port 15 is used
pin when port 11 is used
Therefore, it is
p.174
p.175
p.183
p.188
p.189
p.190
p.200
p.200
p.202
p.203
p.212
p.217
p.217
p.217
p.217
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