UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 12

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
CHAPTER 15 SERIAL INTERFACE IICA ........................................................................................... 583
CHAPTER 16 LCD CONTROLLER/DRIVER ....................................................................................... 666
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
14.7 Operation of Simplified I
14.8 Processing Procedure in Case of Error ................................................................................. 574
14.9 Relationship Between Register Settings and Pins ............................................................... 576
15.1 Functions of Serial Interface IICA........................................................................................... 583
15.2 Configuration of Serial Interface IICA .................................................................................... 586
15.3 Registers Controlling Serial Interface IICA............................................................................ 589
15.4 I
15.5 I
15.6 Timing Charts ........................................................................................................................... 651
16.1 Functions of LCD Controller/Driver........................................................................................ 666
16.2 Configuration of LCD Controller/Driver ................................................................................. 670
16.3 Registers Controlling LCD Controller/Driver......................................................................... 672
16.4 LCD Display Data Memory....................................................................................................... 680
16.5 Setting LCD Controller/Driver ................................................................................................. 683
16.6 Common and Segment Signals .............................................................................................. 685
16.7 Display Modes .......................................................................................................................... 692
2
2
C Bus Mode Functions........................................................................................................... 601
C Bus Definitions and Control Methods .............................................................................. 603
14.6.1 UART transmission ..................................................................................................................... 528
14.6.2 UART reception........................................................................................................................... 538
14.6.3 LIN transmission.......................................................................................................................... 545
14.6.4 LIN reception............................................................................................................................... 548
14.6.5 Calculating baud rate .................................................................................................................. 553
14.7.1 Address field transmission .......................................................................................................... 558
14.7.2 Data transmission........................................................................................................................ 563
14.7.3 Data reception ............................................................................................................................. 566
14.7.4 Stop condition generation............................................................................................................ 570
14.7.5 Calculating transfer rate .............................................................................................................. 571
15.4.1 Pin configuration ......................................................................................................................... 601
15.4.2 Setting transfer clock by using IICWL and IICWH registers ........................................................ 602
15.5.1 Start conditions ........................................................................................................................... 603
15.5.2 Addresses ................................................................................................................................... 604
15.5.3 Transfer direction specification.................................................................................................... 604
15.5.4 Acknowledge (ACK) .................................................................................................................... 605
15.5.5 Stop condition ............................................................................................................................. 606
15.5.6 Wait ............................................................................................................................................. 607
15.5.7 Canceling wait ............................................................................................................................. 609
15.5.8 Interrupt request (INTIICA) generation timing and wait control ................................................... 610
15.5.9 Address match detection method ................................................................................................ 611
15.5.10 Error detection........................................................................................................................... 611
15.5.11 Extension code.......................................................................................................................... 611
15.5.12 Arbitration.................................................................................................................................. 612
15.5.13 Wakeup function........................................................................................................................ 614
15.5.14 Communication reservation....................................................................................................... 617
15.5.15 Cautions .................................................................................................................................... 621
15.5.16 Communication operations........................................................................................................ 622
15.5.17 Timing of I
2
C interrupt request (INTIICA) occurrence ................................................................ 630
2
C (IIC10, IIC20) Communication ................................................... 557
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