UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 262

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
6.2 Configuration of Timer Array Unit
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
The timer array unit includes the following hardware.
Figures 6-1 and 6-2 show block diagrams.
Remark
Timer/counter
Register
Timer input
Timer output
Control registers
mn: Unit number + Channel number, pq: Unit number + Channel number (only for channels provided with
timer I/O pins)
78K0R/LF3:
78K0R/LG3:
78K0R/LH3:
Item
m = 0, 1, mn = 00 to 07, 10 to 13, pq = 0, pq = 00 to 04, 07
m = 0, 1, mn = 00 to 07, 10 to 13, pq = 0, pq = 00 to 07
m = 0, 1, mn = 00 to 07, 10 to 13, pq = 0, 1, pq = 00 to 07, 10 to 13
Timer counter register mn (TCRmn)
Timer data register mn (TDRmn)
TIpq pin, RxD3 pin (for LIN-bus)
TOpq pins, output controller
<Registers of unit setting block>
• Peripheral enable register 0 (PER0)
• Timer clock select register m (TPSm)
• Timer channel enable status register m (TEm)
• Timer channel start register m (TSm)
• Timer channel stop register m (TTm)
• Timer input select registers 0, 1 (TIS0, TIS1)
• Timer output enable register p (TOEp)
• Timer output register p (TOp)
• Timer output level register p (TOLp)
• Timer output mode register p (TOMp)
<Registers of each channel>
• Timer mode register mn (TMRmn)
• Timer status register pq (TSRpq)
• Input switch control register (ISC) (channel 7 of timer array unit 0 only)
• Noise filter enable registers 1, 2 (NFEN1, NFEN2)
• Port mode registers 1, 3, 5, 8 (PM1, PM3, PM5, PM8)
• Port registers 1, 3, 5, 8 (P1, P3, P5, P8)
Table 6-1. Configuration of Timer Array Unit
Configuration
CHAPTER 6 TIMER ARRAY UNIT
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