UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 913

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
(2) Serial interface: Serial array unit (8/18)
Notes 1.
Caution Select the TTL input buffer for RxDq and the N-ch open drain output (V
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Transfer
rate
Parameter
(Remarks are given on the next page.)
(T
(e) Communication at different potential (2.5 V, 3 V) (UART mode) (dedicated baud rate generator output) (2/2)
Baud rate error (theoretical value) =
Baud rate error (theoretical value) =
A
Maximum transfer rate =
Maximum transfer rate =
2.
3.
4.
= −40 to +85°C, 2.7 V ≤ V
using the PIMg and POMx registers.
The smaller maximum transfer rate derived by using f
transfer rate.
Expression for calculating the transfer rate when 4.0 V ≤ V
This value as an example is calculated when the conditions described in the “Conditions” column are met.
Refer to Note 1 above to calculate the maximum transfer rate under conditions of the customer.
The smaller maximum transfer rate derived by using f
transfer rate.
Expression for calculating the transfer rate when 2.7 V ≤ V
This value as an example is calculated when the conditions described in the “Conditions” column are met.
Refer to Note 3 above to calculate the maximum transfer rate under conditions of the customer.
Symbol
* This value is the theoretical value of the relative difference between the transmission and reception sides.
* This value is the theoretical value of the relative difference between the transmission and reception sides.
transmission
DD
{−C
{−C
4.0 V ≤ V
2.7 V ≤ V
2.7 V ≤ V
2.3 V ≤ V
= EV
b
b
× R
× R
DD
b
b
DD
DD
b
b
Transfer rate × 2
Transfer rate × 2
≤ 4.0 V
< 2.7 V
× ln (1−
× ln (1−
≤ 5.5 V, V
= EV
= EV
Conditions
DD
DD
1
1
1
1
≤ 5.5 V,
< 4.0 V,
(
(
SS
2.2
2.0
V
V
Transfer rate
Transfer rate
b
b
= EV
)} × 3
)} × 3
f
C
2.7 V
f
C
2.3 V
CLK
CLK
SS
1
1
b
b
−{
−{
= 50 pF, R
= 50 pF, R
= 16.8 MHz, f
= 19.2 MHz, f
= AVss = 0 V)
CHAPTER 31 ELECTRICAL SPECIFICATIONS
MCK
MCK
−C
−C
/6 or the following expression is the valid maximum
/6 or the following expression is the valid maximum
DD
[bps]
DD
[bps]
b
b
b
b
× R
× R
= 1.4 kΩ, V
= 2.7 kΩ, V
= EV
= EV
) ×Number of transferred bits
) ×Number of transferred bits
MCK
MCK
b
b
× ln (1 −
× ln (1 −
= f
= f
DD
DD
CLK
CLK
≤ 5.5 V and 2.7 V ≤ V
< 4.0 V and 2.3 V ≤ V
,
,
b
b
=
=
MIN.
2.2
2.0
V
V
DD
b
b
tolerance) mode for TxDq by
TYP.
)}
)}
2.8
1.2
Note 1
Note 3
MAX.
b
b
Note 2
Note 4
≤ 4.0 V
< 2.7 V
× 100 [%]
× 100 [%]
Mbps
Mbps
Unit
bps
bps
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