UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 1007

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
2nd Edition
Edition
Modification of Cautions 1, 2 in Figure 25-1 Format of Regulator Mode Control
Register (RMC)
Modification of Caution 4 in 27.8 Flash Memory Programming by Self-
Programming
Absolute Maximum Ratings
• Modification of Output voltage (V
low (I
DC Characteristics
• Modification of Output current, high (I
Modification of Caution 2 in Figure 20-2 Format of Key Return Mode Register
(KRM)
Addition of Table 21-1 Operating Statuses in HALT Mode (3/3)
Modification of Note in Figure 21-3 HALT Mode Release by Interrupt Request
Generation
Modification of Figure 21-4 HALT Mode Release by Reset
Modification of Figure 21-5 Operation Timing When STOP Mode Is Released
(When Unmasked Interrupt Request Is Generated)
Modification of Figure 21-6 STOP Mode Release by Interrupt Request Generation
Modification of Figure 21-7 STOP Mode Release by Reset
Modification of Figure 22-2 Timing of Reset by RESET Input to Figure 22-4
Timing of Reset in STOP Mode by RESET Input
Modification of Table 22-1 Operation Statuses During Reset Period
Modification of Table 22-2 Hardware Statuses After Reset Acknowledgment
Modification of Figure 23-2 Timing of Generation of Internal Reset Signal by
Power-on-Clear Circuit and Low-Voltage Detector
Modification of Caution 1 in Figure 24-2 Format of Low-Voltage Detection
Register (LVIM)
Modification of 24.4.1 When used as reset • When stopping operation
Modification of 24.4.2 When used as interrupt • When stopping operation
(1) Basic operation in AC Characteristics
• Modification of Instruction cycle
• Addition of Note
• Modification of Minimum instruction execution time during main system clock
• Addition of Minimum instruction execution time during self programming
(2) Serial interface: Serial array unit in AC Characteristics
• Modification of (d) Data hold time (transmission) in During communication at
• Modification of (h) Data hold time (transmission) in Communication at different
potential (2.5 V, 3 V) (simplified I
voltage, high (V
converter operating current (I
(I
I
operation (FSEL = 0, RMC = 00H) to Minimum instruction execution time
during self programming mode (RMC = 00H)
mode (RMC = 5AH)
same potential (simplified I
LCD3
AMP
OL3
)
), Voltage reference operating current (I
)
OH2
), Output voltage, low (V
2
C mode)
ADC
O4
2
C mode)
), Operational amplifier operating current
Description
), Output current, high (I
OH2
), Output current, low (I
OL2
VR
), Supply current (I
), LCD operating current (I
OH3
), Output current,
OL2
DD2
), Output
APPENDIX D REVISION HISTORY
), A/D
LCD2
,
CHAPTER 25
REGULATOR
CHAPTER 27 FLASH
MEMORY
CHAPTER 31
ELECTRICAL
SPECIFICATIONS
(TARGET)
CHAPTER 20 KEY
INTERRUPT
FUNCTION
CHAPTER 21
STANDBY FUNCTION
CHAPTER 22 RESET
FUNCTION
CHAPTER 23 POWER-
ON-CLEAR CIRCUIT
CHAPTER 24 LOW-
VOLTAGE DETECTOR
Chapter
(5/11)
1007