UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 844
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0R/Lx3
27.4.7 Power supply
programmer, and the V
flash memory programmer to use the power monitor function with the flash memory programmer.
27.5 Registers Controlling Flash Memory
(1) Background event control register (BECTL)
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Address: FFFBEH
To use the supply voltage output of the flash memory programmer, connect the V
To use the on-board supply voltage, connect in compliance with the normal operation mode.
However, when using the on-board supply voltage, be sure to connect the V
Supply the same other power supplies (EV
Symbol
BECTL
Even if the FLMD0 pin is not controlled externally, it can be controlled by software with the BECTL register to set the
self-programming mode.
However, depending on the processing of the FLMD0 pin, it may not be possible to set the self-programming mode by
software. When using BECTL, leaving the FLMD0 pin open is recommended. When pulling it down externally, use a
resistor with a resistance of 100 kΩ or more. In addition, in the normal operation mode, use BECTL with the pull
down selection. In the self-programming mode, the setting is switched to pull up in the self- programming library.
The BECTL register is set by a 1-bit or 8-bit memory manipulation instruction.
Reset input sets this register to 00H.
FLMDPUP
FLMDPUP
0
1
7
After reset: 00H
SS
Figure 27-6. Format of Background Event Control Register (BECTL)
pin to GND of the flash memory programmer.
Selects pull-down
Selects pull-up
6
0
R/W
5
0
DD
, EV
SS
, AV
DD0
4
0
Software control of FLMD0 pin
, AV
DD1
, and AV
3
0
SS
) as those in the normal operation mode.
DD
CHAPTER 27 FLASH MEMORY
and V
2
0
DD
pin to V
SS
pins to V
1
0
DD
of the flash memory
DD
and GND of the
0
0
844
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