UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 202

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
(8) Input switch control register (ISC)
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Caution For 78K0R/LF3, bits 3 and 7 must be set to 0. For 78K0R/LG3 and 78K0R/LH3, bit 7 must be set to 0.
Bits 0 and 1 of ISC are used for linking with an external interrupt or a timer array unit when performing a LIN-bus
communication operation with UART3.
When bit 0 is set to 1, the input signal of the serial data input (R
that can be used to detect a wakeup signal.
When bit 1 is set to 1, the input signal of the serial data input (R
widths of a sync break field and a sync field can be measured by the timer.
Bits 2 to 4 of ISC are used to prevent through current from entering when using the TI04/SEGxx/P53,
TI02/SEGxx/P52, and RxD3/SEGxx/P50 pins as segment outputs or port outputs.
The segment output pins to be used alternatively with the TI04, TI02, and RxD3 pins are internally connected with a
Schmitt trigger buffer. When using these pins as segment outputs or port outputs, bits 2 to 4 of ISC must be set to 0
(prohibiting input to Schmitt trigger buffers) in order to prevent through current from entering.
ISC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Remark
PF5H
PF5L
• 78K0R/LF3:
• 78K0R/LG3:
• 78K0R/LH3:
0
1
0
1
The segment output pins to be used alternatively with the TI02, TI04, and RxD3 pins vary, depending on
the product.
Used the P54 to P57 pins as port (other than segment output)
Used the P54 to P57 pins as segment output
Used the P50 to P53 pins as port (other than segment output)
Used the P50 to P53 pins as segment output
Figure 4-50. Format of Port Function Register (PFALL) (2/2)
TI04/SEG27/P53, TI02/SEG28/P52, RxD3/SEG30/P50
TI04/SEG36/P53, TI02/SEG37/P52, RxD3/SEG39/P50
TI04/SEG50/P53, TI02/SEG51/P52, RxD3/SEG53/P50
Port/segment outputs specification of the P54 to P57 pins
Port/segment outputs specification of P50 to P53 pins
X
D3) pin is selected as a timer input, so that the pulse
X
D3) pin is selected as an external interrupt (INTP0)
CHAPTER 4 PORT FUNCTIONS
202