UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 214

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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78K0R/Lx3
5.2 Configuration of Clock Generator
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
(2) Subsystem clock
(3) Internal low-speed oscillation clock (clock for watchdog timer)
Remarks 1. f
The clock generator includes the following hardware.
Control registers
Oscillators
• XT1 clock oscillator
• Internal low-speed oscillator
This circuit oscillates a clock of f
Oscillation can be stopped by setting XTSTOP (bit 6 of CSC).
This circuit oscillates a clock of f
The internal low-speed oscillation clock cannot be used as the CPU clock. The only hardware that operates with
the internal low-speed oscillation clock is the watchdog timer.
Oscillation is stopped when the watchdog timer stops.
2. The watchdog timer stops in the following cases.
f
• When bit 4 (WDTON) of an option byte (000C0H) = 0
• If the HALT or STOP instruction is executed when bit 4 (WDTON) of an option byte (000C0H) = 1 and
Item
SUB
IL
:
bit 0 (WDSTBYON) = 0
: Subsystem clock frequency
Internal low-speed oscillation clock frequency
Clock operation mode control register (CMC)
Clock operation status control register (CSC)
Oscillation stabilization time counter status register (OSTC)
Oscillation stabilization time select register (OSTS)
System clock control register (CKC)
20 MHz internal high-speed oscillation control register (DSCCTL)
Peripheral enable registers 0 (PER0)
Operation speed mode control register (OSMC)
X1 oscillator
XT1 oscillator
Internal high-speed oscillator
Internal low-speed oscillator
Table 5-1. Configuration of Clock Generator
IL
= 30 kHz (TYP.).
SUB
= 32.768 kHz by connecting a 32.768 kHz resonator to XT1 and XT2.
Configuration
CHAPTER 5 CLOCK GENERATOR
214