UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 644

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UPD78F1506GF-GAT-AX

Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet

Specifications of UPD78F1506GF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Remark
(6) Operation when arbitration loss occurs (no communication after arbitration loss)
Remark
ST
1: IICS = 0110×010B
2: IICS = 0010×110B
3: IICS = 0010×100B
4: IICS = 0010××00B
5: IICS = 00000001B
ST
1: IICS = 01000110B
2: IICS = 00000001B
When the device is used as a master in a multi-master system, read the MSTS bit each time interrupt request
signal INTIICA has occurred to check the arbitration result.
(a) When arbitration loss occurs during transmission of slave address data (when WTIM = 1)
AD6 to AD0 R/W ACK
AD6 to AD0 R/W ACK
(ii) When WTIM = 1
×:
: Always generated
: Generated only when SPIE = 1
: Always generated
: Generated only when SPIE = 1
Don’t care
1
1
2
D7 to D0
D7 to D0
ACK
ACK
3
D7 to D0
D7 to D0
CHAPTER 15 SERIAL INTERFACE IICA
ACK
ACK
4
SP
SP
5
2
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