UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 425

• Manufacturer Part Number: UPD78F1506GF-GAT-AX
• Description: MCU 16BIT 78K0R/LX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Lx3r

Specifications of UPD78F1506GF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Lx3
11.3 Registers Used in D/A Converter
(1) Peripheral enable register 0 (PER0)
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Address: F00F0H
The D/A converter uses the following four registers.
• Peripheral enable register 0 (PER0)
• D/A converter mode register (DAM)
• D/A conversion value setting registers W0, W1 (DACSW0, DACSW1)
• D/A conversion value setting registers 0, 1 (DACS0, DACS1)
Symbol
PER0
PER0 is used to enable or disable use of each peripheral hardware macro. Clock supply to a hardware macro that is
not used is stopped in order to reduce the power consumption and noise.
When the D/A converter is used, be sure to set bit 6 (DACEN) of this register to 1.
PER0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Cautions When setting the D/A converter, be sure to set DACEN to 1 first. If DACEN = 0, writing to a
Note 78K0R/LG3, 78K0R/LH3 only
DACEN
RTCEN
<7>
0
1
control register of the D/A converter is ignored, and, even if the register is read, only the default
value is read.
After reset: 00H
Stops supply of input clock.
• SFR used by the D/A converter cannot be written.
• The D/A converter is in the reset status.
Supplies input clock.
• SFR used by the D/A converter can be read/written.
DACEN
Figure 11-2. Format of Peripheral Enable Register 0 (PER0)
<6>
R/W
ADCEN
<5>
IICAEN
Control of D/A converter input clock
<4>
Note
SAU1EN
<3>
SAU0EN
CHAPTER 11 D/A CONVERTER
<2>
TAU1EN
<1>
TAU0EN
<0>
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